1. Field of the Invention
The invention relates to a multiprocessor computer system which includes n parallel-operating computer modules, each of which is situated in its own fault isolation area, each computer module including:
a processor module for processing data words which consist of k.gtoreq.t+1 data symbols;
a data channel which is connected to a data connection of the processor module;
a reducing encoder which is connected to the data channel in order to form a code symbol from a data word received so that the encoders of the respective computer modules form a code symbol of a code word from respective versions of a data word, said code word comprising n.gtoreq.t+2t code symbols of a code having a correction capability of t.gtoreq.1 code symbols per code word;
a storage module which includes a data input which is connected to an output of the associated reducing encoder;
and a data word reconstruction module which is connected, via a conenction network, to data inputs of the storage modules of all computer modules in order to receive a respective code symbol of a code word from each computer module and to reconstruct a data word therefrom for presentation on the data channel;
said computer system also including a connection for receiving an original version of an external message in each of said n.gtoreq.A.gtoreq.1 computer modules.
2. Description of the Prior Art
An example of such a computer system is known from U.S. Pat. No. 4,402,045 assigned to the assignee of this application. The known computer system allows for one of the computer modules to fail completely, without causing the computer system as a whole to cease operating correctly. The storage capacity required is smaller than that of complete triplication (which also allows for the failure of a computer module, as is known). This advantage is achieved by a comparatively elaborate extension of the data processing capacity which involves the actual processor modules and the data word reconstruction modules. For k=2 and n=4, the latter is quadrupled in comparison with a doubling of the storage capacity. For higher values of k and n, for example k=4 and n=6, the relative redundancy is smaller again than for k=2 and n=4. The code used may be a known Reed-Solomon code. This code has the property that the code distance over the symbols always exceeds the number of redundant symbols in a code word by one. Thus, more symbols can be corrected per code word. For k=4 and n=8, two modules are permitted to supply disturbed information without the data processing in the other modules being disturbed thereby. Generally, in total ##EQU1## computer modules may fail. Such a computer system can utilize redundancy in other ways, for example by ignoring a computer module which is considered to be unreliable. This so-called erasure mode will not be elaborated upon herein.
Said U.S. Patent also describes several redundancy levels for the connection of an external apparatus. Such an external apparatus is, for example, a customary peripheral apparatus computer systems, for an input apparatus, an output apparatus or a background memory. The external apparatus in a simple system is singular and transmits external messages to the computer system. These external messages may concern information as well as control signals. In the case of data, the data is transmitted to several computer modules, i.e. always to at least t+1 modules when that at least one correctly operating computer module has to receive an external message. It is now possible for several correctly operating computer modules to receive an external message as different, so-called original versions having a different contents. This may be due to a defect in the external apparatus which applies different information to the respective computer modules via different connections. It may also be that the otherwise correctly operating computer modules interpret the same information differently, for example due to a different discrimination level for discrimination of a signal level "0" or "1". When different information of one and the same external message circulates in the computer system, it can be interpreted on the one hand as if the deviating computer module is defective: the external deviation is then mapped as a disturbed module. However, alternatively 1, . . . t computer modules themselves may be defective. (The number t is the largest number of symbols which can be corrected per code word).